In digital system, many types of code exist that are used for different application. Binary Codes, Excess-3 codes and Gray codes are 3 different codes that are used in digital system. Binary codes are also called BCD(Binary Coded Decimal) and are 4 bit codes that represents 16 different decimal values. Excess-3 codes are codes obtained by adding 3 equivalent binary codes to each of the BCD binary codes starting from 0(0000). Gray codes are another type of codes which have the property that there is only one bit change in going from one code to the next.
The following table shows the BCD, Excess-3 and the Gray codes and their relation:
A code converter is often required to convert from one code to another.
In VHDL programming we can use the concurrent statement select to convert the binary to excess-3 as follows:
library ieee;
use ieee.std_logic_1164.all;
entity bi2ex3 is
port(x : in std_logic_vector(3 downto 0);
y : out std_logic_vector(3 downto 0)
);
end bi2ex3;
architecture model of bi2ex3 is
begin
with x select
y <= "0011" when "0000",
"0100" when "0001",
"0101" when "0010",
"0110" when "0011",
"0111" when "0100",
"1000" when "0101",
"1001" when "0110",
"1010" when "0111",
"1011" when "1000",
"1100" when "1001",
"1101" when "1010",
"1110" when "1011",
"1111" when "1100",
"0000" when "1101",
"0001" when "1110",
"0010" when others;
end model;
The simulated waveform obtained from a VHDL software is as follows:
Similarly we can use case statement of VHDL to construct the above code conversion truth table.
The following table shows the BCD, Excess-3 and the Gray codes and their relation:
A code converter is often required to convert from one code to another.
In VHDL programming we can use the concurrent statement select to convert the binary to excess-3 as follows:
library ieee;
use ieee.std_logic_1164.all;
entity bi2ex3 is
port(x : in std_logic_vector(3 downto 0);
y : out std_logic_vector(3 downto 0)
);
end bi2ex3;
architecture model of bi2ex3 is
begin
with x select
y <= "0011" when "0000",
"0100" when "0001",
"0101" when "0010",
"0110" when "0011",
"0111" when "0100",
"1000" when "0101",
"1001" when "0110",
"1010" when "0111",
"1011" when "1000",
"1100" when "1001",
"1101" when "1010",
"1110" when "1011",
"1111" when "1100",
"0000" when "1101",
"0001" when "1110",
"0010" when others;
end model;
The simulated waveform obtained from a VHDL software is as follows:
Similarly we can use case statement of VHDL to construct the above code conversion truth table.
